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 NTD4963N Power MOSFET
Features
30 V, 44 A, Single N-Channel, DPAK/IPAK
* * * * *
Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses Three Package Variations for Design Flexibility These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant
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V(BR)DSS 30 V RDS(ON) MAX 9.6 mW @ 10 V 16 mW @ 4.5 V D ID MAX 44 A
Applications
* CPU Power Delivery * DC-DC Converters * Recommended for High Side (Control)
MAXIMUM RATINGS (TJ = 25C unless otherwise stated)
Parameter Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Current tp=10ms Steady State TA = 25C TA = 85C TA = 25C TA = 25C TA = 85C TA = 25C TC = 25C TC = 85C TC = 25C TA = 25C TA = 25C PD IDM IDmaxPkg TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 20 10.0 7.2 1.64 8.1 5.8 1.1 44 32 35.7 132 35 -55 to +175 30 6.0 33.8 W A A C A V/ns mJ 4 Drain YWW 49 63NG W A W A 12 3 4 Unit V V A G
S N-CHANNEL MOSFET 4 4
1
CASE 369AA DPAK (Bent Lead) STYLE 2
2 3 CASE 369AC CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK)
23
1
MARKING DIAGRAMS & PIN ASSIGNMENTS
4 Drain YWW 49 63NG 4 Drain YWW 49 63NG
Current Limited by Package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source dV/dt
Single Pulse Drain-to-Source Avalanche Energy (TJ = 25C, VDD = 50 V, VGS = 10 V, IL = 26 Apk, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8" from case for 10 s)
TL
260
C
2 1 23 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 4963N G = Year = Work Week = Device Code = Pb-Free Package
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2009
December, 2009 - Rev. 0
1
Publication Order Number: NTD4963N/D
NTD4963N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Junction-to-Case (Drain) Junction-to-TAB (Drain) Junction-to-Ambient - Steady State (Note 3) Junction-to-Ambient - Steady State (Note 4) 3. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJC-TAB RqJA RqJA Value 4.1 3.5 77 118 Unit C/W
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/ TJ IDSS IGSS VGS(TH) VGS(TH)/TJ RDS(on) VGS = 10 V VGS = 4.5 V Forward Transconductance gFS CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W VGS = 10 V, VDS = 15 V, ID = 30 A VGS = 4.5 V, VDS = 15 V, ID = 30 A VGS = 0 V, f = 1.0 MHz, VDS = 12 V ID = 30 A ID = 15 A ID = 30 A ID = 15 A VDS = 1.5 V, ID = 30 A CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 12 20 14 3 ns 1035 220 115 8.1 1.2 3.5 3.5 16.2 nC nC pF VGS = 0 V, VDS = 24 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 30 25 1.0 10 100 V mV/C mA nA Symbol Test Condition Min Typ Max Unit
Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance
VDS = 0 V, VGS = 20 V VGS = VDS, ID = 250 mA 1.45 5 8.2 8.2 13.6 13.6 40
2.5
V mV/C
9.6 mW
16
S
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils.
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2
NTD4963N
ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified)
Parameter SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD tRR ta tb QRR LS LD LD LG RG TA = 25C VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A VGS = 0 V, IS = 30 A TJ = 25C TJ = 125C 0.96 0.83 17 9 8 6 nC ns 1.2 V td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 7.0 17 20 2 ns Symbol Test Condition Min Typ Max Unit
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge PACKAGE PARASITIC VALUES Source Inductance (Note 7) Drain Inductance, DPAK Drain Inductance, IPAK (Note 7) Gate Inductance (Note 7) Gate Resistance
2.49 0.0164 1.88 3.46 1.0
nH
W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. 7. Assume terminal length of 110 mils.
ORDERING INFORMATION
Device NTD4963NT4G NTD4963N-1G NTD4963N-35G Package DPAK (Pb-Free) IPAK (Pb-Free) IPAK Trimmed Lead (Pb-Free) Shipping 2500 / Tape & Reel 75 Units / Rail 75 Units / Rail
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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3
NTD4963N
TYPICAL PERFORMANCE CURVES
60 50 40 30 20 10 0 4.6 V thru 10 V TJ = 25C 60 VGS = 4.4 V ID, DRAIN CURRENT (A) 4.2 V 4.0 V 3.8 V 3.6 V 3.4 V 3.2 V 2.8 V 0 1 2 3 4 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 50 40 30 20 10 0 TJ = 25C VDS = 10 V
ID, DRAIN CURRENT (A)
TJ = 125C 1 1.5 2 2.5 3
TJ = -55C 3.5 4 4.5 5 5.5
VGS, GATE-TO-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 2E-02 1.9E-02 1.8E-02 1.7E-02 1.6E-02 1.5E-02 1.4E-02 1.3E-02 1.2E-02 1.1E-02 1.0E-02 9E-03 8E-03 7E-03 6E-03 5E-03 RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 20E-03
Figure 2. Transfer Characteristics
ID = 30 A TJ = 25C
TJ = 25C VGS = 4.5 V
15E-03
10E-03
VGS = 10 V
5E-03
3
4
5
6
7
8
9
10
0E+00
10
15
20
25
30
35
40
45
50
VGS, GATE-TO-SOURCE VOLTAGE (V) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED)
ID, DRAIN CURRENT (A)
Figure 3. On-Resistance vs. Gate-to-Source Voltage
1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 ID = 30 A VGS = 10 V 10,000 1,000 IDSS, LEAKAGE (nA)
Figure 4. On-Resistance vs. Drain Current and Gate Voltage
VGS = 0 V
TJ = 150C TJ = 125C
100 10 TJ = 25C 1 0.1
-25
0
25
50
75
100
125
150
5
10
15
20
25
30
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-to-Source Leakage Current vs. Voltage
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4
NTD4963N
TYPICAL PERFORMANCE CURVES
VGS, GATE-TO-SOURCE VOLTAGE (V) 1200 1000 C, CAPACITANCE (pF) 800 600 400 200 0 Crss 0 5 10 15 20 25 30 Ciss 10 9 8 7 6 5 4 3 2 1 0 0 2 ID = 30 A TJ = 25C VDD = 15 V VGS = 30 A 10 4 6 12 14 8 QG, TOTAL GATE CHARGE (nC) 16 18 Qgs Qgd VGS = 0 V TJ = 25C QT
Coss
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000 IS, SOURCE CURRENT (A) VDD = 15 V ID = 15 A VGS = 11.5 V t, TIME (ns) 100 td(off) tr 10 30
Figure 8. Gate-to-Source and Drain-to-Source Voltage vs. Total Charge
VGS = 0 V 25 TJ = 25C 20 15 10 5 0 0.4 0.5 0.6 0.7 0.8 0.9 1.0
td(on) tf
1
1
10 RG, GATE RESISTANCE (W)
100
VSD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation vs. Gate Resistance
VGS = 30 V Single Pulse TC = 25C EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 1000 I D, DRAIN CURRENT (A) 100 10 1 0.1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 35
Figure 10. Diode Forward Voltage vs. Current
ID = 26 A 30 25 20 15 10 5 0 25 50 75 150 100 125 TJ, STARTING JUNCTION TEMPERATURE (C)
10 ms 100 ms 1 ms 10 ms
dc 100
0.01
1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased Safe Operating Area
Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature
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5
NTD4963N
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE) CASE 369AA-01 ISSUE A
-T- B V R
4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 --- 0.89 1.27 3.93 ---
C E
S
A
1 2 3
Z H U
F L D
2 PL
J
DIM A B C D E F H J L R S U V Z
0.13 (0.005)
M
T
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
SOLDERING FOOTPRINT*
6.20 0.244 3.0 0.118
2.58 0.101
5.80 0.228
1.6 0.063
6.172 0.243
SCALE 3:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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6
NTD4963N
PACKAGE DIMENSIONS
3 IPAK, STRAIGHT LEAD CASE 369AC-01 ISSUE O
B V R C E
NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. DIM A B C D E F G H J K R V W INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25
A
SEATING PLANE
W F G
K J D H
3 PL
0.13 (0.005) W
IPAK (STRAIGHT LEAD DPAK) CASE 369D-01 ISSUE B
B V R
4
C E Z
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 ---
S -T-
SEATING PLANE
A
1 2 3
K
F D G
3 PL
J
H
M
0.13 (0.005)
T
STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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7
NTD4963N/D


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